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"Thin Is In" For Mobile Applications, But Getting There Presents New Challenges

David Lammers

To paraphrase Wallis Simpson, the Duchess of Windsor, in the universe of mobile electronics, "you can never be too rich or too thin." In one sense, mobile systems are trending bigger. Apple, for example, has switched gears successfully, offering larger-screen, feature-rich iPhones and tablets. Yet even as some X and Y dimensions are growing, the Z dimension is shrinking, as consumers see thin and lightweight systems as both fashionable and functional.

"With each subsequent generation mobile devices have gotten thinner, and that is raising the bar for the device makers as well as the toolmakers," said Mike Rosa, director of Strategy and Technical Marketing for Emerging Technologies at Applied Materials.

Jan Vardaman, President of TechSearch International, Austin, Texas.

These thinner mobile systems are being followed by wearables, watches and the emerging Internet of Things (IoT) where thick products are often obtrusive and uncomfortable.

Thin systems increasingly incorporate wafer level packaging (WLP), especially for analog, power management, and other devices with relatively low pin counts. Wafer level packaging (WLP) normally involves three or four additional mask layers to create wafer-scale solder ball connections, but the result is a packaged die with a small, thin footprint .

"Fashion dictates that smartphones are made thinner and thinner, driving greater use of WLPs," said E. Jan Vardaman, president of packaging consultancy TechSearch International Inc. in Austin, Texas.

"The demand for thin packages, and greater functionality in smaller spaces, drives the increased adoption of WLPs. The dramatic growth for WLPs in mobile phones is expected to continue," she said (see figure 1).

Figure 1: Approximately 30 percent of the chips in three of the market-leading smartphones use wafer level chip scale packaging. (Source: Yole Developpement and System Plus Consulting)

Vardaman noted that Apple’s first iPhone used two WLPs in 2007, but the much-thinner iPhone 6 has more than 26 WLPs. "Even the latest portable communication gadget, the Apple Watch, contains as many as a dozen WLPs."

And the trend toward wafer-level packaging is not slowing down, with Yole Developpement forecasting a CAGR for fan-in WLP units of 9% for the six-year 2014-to-2020 period.

Traditionally, fan-in WLPs have been used for a variety of devices with low pin counts and small die sizes. WLPs are used for power MOSFETs, power management ICs, controllers, ring tones for mobile phones, battery management devices, integrated passives, CMOS image sensors, DC-DC converters and some memory devices. RF components such as Bluetooth EMI filters, and devices for ESD protection, are packaged in WLPs, Vardaman says.

However, Rozalia Beica, chief technology officer at Yole, said fan-out WLP is a hot topic now (see figure 2). The fan-out approach accounted for about $174 million in revenues last year, but is set to grow. TSMC has been working on a fan-out WLP technology that could be used in smart phone application processors, she said, noting that the foundry has taken an “interesting and smart” approach to fan-out WLP, but has "thus far provided few public details."1

Figure 2: Fan-in wafer level packaging is prevalent in relatively low-pin count ICs used in mobile phones. Fan-out wafer level packaging is gaining momentum for higher pin count devices. (Source: Yole Developpement)


MEMS-based sensors, which have reached such high volumes in smartphones, also are under pressure to become thinner. Increasingly, through-silicon vias (TSVs) are being used to connect the MEMS device with the CMOS ASIC which controls it. The result is a thinner sensor module that has greater onboard capabilities, thanks to its closely packaged CMOS circuitry.

Rosa said a push is on to shrink the critical dimensions (CD) of the TSVs so they take up less area, allowing more TSVs in certain parts of the chips.

With MEMs, TSVs allow smaller die and thus more die per wafer. "If you go from wire bonds to TSVs, you can save 25 to 30 percent of your die, area wise. For the device makers, that is huge, as you can increase the die output per wafer by 25-30 percent with TSVs," he said.

Thin Innovations

Rob Lineback, who tracks the sensor market at IC Insights, said "thinner is definitely the way to go" in consumer devices, and that is driving innovation. He noted that STMicroelectronics has come up with innovative methods of making "ultra-small, ultra-thin pressure sensors" by creating an air cavity in monolithic silicon.

Lineback noted that Samsung Electronics also has made progress on the thin front.

In an announcement2 in late July, Samsung Electronics said it developed a 16 megapixel image sensor that reduces a smartphone or tablet’s camera module’s height by 20 percent. The image sensor shrinks each pixel to one micron, compared to 1.12 μm pixels used in current 16 Mpixel image sensors.

Samsung vice president Kyushik Hong said the smaller pixel "minimizes the overall size and height of an image sensor module, making it an ideal solution for today’s increasingly thinner mobile devices."

While the cameras on today smartphones project slightly from the case, the new image sensor has a module z-height that is less than 5mm, offering designers "the ability to develop a mobile device with minimal camera protrusion without compromising on resolution," he added.

The smaller pixel delivers an image quality that is on par with 1.12 μm-pixel based image sensors.

Rosa said the consequences of the thinness trend extend well beyond what is traditionally referred to as packaging. For example, today, as wafers are thinned to a few hundred microns, traditional diamond dicing saws are running out of steam. With more die crammed on to wafers thinned to 200-300 microns, interstitials become so small that any chipping from a saw blade impacts the active area, reducing yields.

WLP Production

Vardaman said much of the WLP activity is in 200mm fabs, largely because of the product mix. "A lot of WLP is still done on 200mm, but some of it will migrate to 300mm. The CMOS image sensor lines are typically 300mm, and some 300mm lines are put in for analog products, with Texas Instruments as an example. But a lot of those products will remain on 200mm," she said.

IC Insights’ Lineback said some companies are trying to decide what to do with older 300mm fabs which are not well suited to making the most advanced application processors. Some of those fabs may be converted to WLP-capable front ends.

"300mm manufacturing is reaching a point in time where, for the older front ends, the manufacturers are looking for ways to use that equipment. Eventually we may see some things currently made on 200mm move to 300mm, but companies have to figure out how to get the same process yields across the 300mm wafers," Lineback said.

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1TSMC Preps 10nm, Tunes 16nm

2Samsung Announces Mass Production of Industry’s First Mobile Image Sensor With 1.0 μm Pixels