Centura® iSprint™ ALD/CVD SSW
Tungsten, with its low resistivity and minimal electro-migration, has long been used in logic and memory devices as the material of choice for filling the contacts and middle-of-line (lowest-level) interconnects that link transistors to the rest of the integrated circuit. At earlier nodes, larger dimensions made tungsten fill integration possible using conformal CVD deposition. At today’s leading-edge nodes, however, minute dimensions and re-entrant profiles make it increasingly difficult to ensure complete and seamless tungsten fill of these features using this method. Overhang around the tops of ultra-small openings precludes the conformal process from completely filling features without voids; center seams are an inevitable result of conformal deposition, even in the absence of voids. These attributes render extremely small features vulnerable to further breach during CMP; high feature densities and lack of via redundancy in advanced chip designs mean that a single void can cause device failure and yield loss.
Leveraging Applied Materials’ long-standing expertise in materials engineering and metal CVD for contact applications, the Centura iSprint ALD/CVD SSW system employs a unique, “selective” suppression mechanism that results in a bottom-up fill free of seams or voids. The improved integrity of the fill helps increase the volume of tungsten (potentially lowering resistance), creates more robust features, and relaxes requirements on the dielectric and etch open steps, thus delivering performance, device design, and yield benefits.
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